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Altera_Forum
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14 years ago

Need help on a design constraint file for a IP

Hi there, I am using Altera's Triple_Speed_Ethernet Mac IP core. And while I was compiling the IP with my design, there prompts warnings that lots of constraints in the generated sdc file from...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Check if the clock names between quotes match those feeding the relevant TSE mac pins in your Quartus design.