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Altera_Forum
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11 years ago

Need advice about coding style

Hello I'm Alex and I am novice for VHDL coding. if my english awful pls forgive me. I trying to understand VHDL PROCESS statement. I try with 1bit full adder with carry save function in Quartus2 v...
Altera_Forum's avatar
Altera_Forum
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11 years ago

in principle the addition (combinatorial only) will do the job.

registering inputs/outputs is a measure to achieve synchronous design and best fmax.

The tradition is to register outputs only (not inputs) per module since then inputs received are already registered.

Excluding very first paths at io which need to be registered