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Altera_Forum's avatar
Altera_Forum
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11 years ago

Need advice about coding style

Hello I'm Alex and I am novice for VHDL coding. if my english awful pls forgive me. I trying to understand VHDL PROCESS statement. I try with 1bit full adder with carry save function in Quartus2 v...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

A slightly quirky one, I agree. However, the following code is confusing Quartus:

  IF ci = '0' THEN
   co <= aab;
  ELSIF ci = '1' THEN
   aob := axb XOR aab; -- the same as (a OR b)
   co <= aob;
  END IF;

Using 'ELSE' covers all other cases. By using 'ELSIF' Quartus believes there may be some other paths it must handle - even though there aren't in this case.

Change these lines to:
  IF ci = '0' THEN
   co <= aab;
  ELSE
   aob := axb XOR aab; -- the same as (a OR b)
   co <= aob;
  END IF;

I recommend you always use an ELSE at the end of conditional statements that infer combinational logic.

Cheers,

Alex