Altera_ForumHonored Contributor13 years agoMy clock port cannot be matched as a port I need information about the critical path in my circuit. I first tried to use Quartus II 9.1 with classical timing analyzer but I obtained the warning message "No paths found for timing analysis...Show Moremultiple-attachments.zip150 KB
Altera_ForumHonored Contributor13 years agoYes, I did receiving the warning "no clock defined in the design".
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