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Ben67's avatar
Ben67
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3 years ago

Multiple test benches

Does Quartus Prime (I am using 21.1 Lite with an evaluation version of Active-HDL) support per-module simulation test benches? I have only been able to configure either RTL or gate-level simulation of the top level module thus far.

I have many years experience in XIlinx ISE and Vivado, and am accustomed to writing module:test bench pairs, and would really prefer this approach as I have some rather complex designs to port into new devices. Simulating only at the top level seems, well.... ridiculous.

4 Replies

  • ShengN_altera's avatar
    ShengN_altera
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    Hi Ben,


    Right-click at the submodules and select properties. Then, set the library path to the path where your project file located. So that those submodules can be compiled into Modelsim or Questa library and to be further used in testbench.


    Best Regards,

    Sheng

    p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution and give Kudos.


  • ShengN_altera's avatar
    ShengN_altera
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    Hi Ben,


    May I know any further update or Should I consider that case to be closed? Thank you.


    Best Regards,

    Sheng


    • Ben67's avatar
      Ben67
      Icon for New Contributor rankNew Contributor
      3 years ago

      I am still awaiting a perpetual license for Active-HDL in order to confirm this solution works.

  • ShengN_altera's avatar
    ShengN_altera
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    Hi,


    Sure. Let me knows if any further updates or considerations.


    Best Regards,

    Sheng