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Altera_Forum's avatar
Altera_Forum
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8 years ago

Multiple RAM with different mif file

Hi all, I am doing a project to design 128 processors with a RAM in each processor. Every thing is the same but the initial data in the RAM. The design of the RAM is using the on chip memory. I...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

thank you for your help. I am new to VHDL, can you explain a little bit more?

I am not quite sure what is an unwrapped ram? I know how to port map the ram at top level module but I am not sure how to map the mif name to them?

Thanks.