multiple constant drivers for net IOP_

Hi,

There are two issues that I raised. One is your error of double drive, the second is a recommendation about buffer port.

Your error will appear when you connect IOP & ALU as one project. You are driving inputpin from two sources:

Drive 1: inputpin <= selop & R0 & A & B;

Drive 2: inputpin is driven by IOP module

I am not saying don't mix comb. with other statements but you can't drive from more than one source in VHDL. If you need more than one drive then you must write a correct construct to resolve the drive.

As to buffer port: This is almost obsolete type of vhdl port(not verilog). It is meant for outputs that need to be read inside module instead of intermediary signal. You better avoid it and use intermediary signal if you want to read your output. Verilog has "buf" which is not a port but actual buffer function.