multiple constant drivers error

yes but if I do that, at the first clock event ( high front) all the block will be running at the same time. And I want that the block will running block after block.

But after your first post I try to mix the two process like that :

I delete first process and I put the clock event line in the second:

Process(etat_pres,etat_suiv, SW(0))
begin
if(clock'event and clock = '1') then etat_suiv <= etat_pres;
end if;
case etat_pres is
		
	when ....

and the compilation done sucessfull ( now i go to send the compilation on the FPGA )