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Altera_Forum's avatar
Altera_Forum
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16 years ago

multidimensional RAM

hello everyone,

I am using altera DE2 cyclon II and quartusII 9.1 . I work on video frames and I need to store them in a two dimensional RAM. I wrote the code like this:

module memory (iCLK, we, a, b, idata, odata);

input iCLK;

//input iRST;

input we;

input [639:0] a;

input [1279:0]b;

input [9:0] idata;

output [9:0] odata;

reg [9:0] memory [9:0][9:0];

integer j,k;

always@(posedge iCLK)

begin

if (we)

begin

for(k = 0; k < 10; k = k +1)

for(j = 0; j < 10; j = j + 1)

memory[k][j] <= idata;

end

end

assign odata = memory[a][b];

endmodule

but the problem is, compiler says there is not enough pins.

could any one help me? or have you another idea to do this.

thanks.

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    is this

    module memory (iCLK, we, a, b, idata, odata);

    your top level ?

    if yes then you will need

    1 pin for iCLK

    1 pin for we

    640 pins for a

    1280 pins for b

    10 pins for idata

    10 pins for odata

    this is a summ of 1942 io pins only for this module and not taken into account the pins for power supply. at least much more than the biggest part i knew.
  • Altera_Forum's avatar
    Altera_Forum
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    you are exactly right. this is just a part of a project.

    I try to minimize the size of ram and writing on the old values. &#305; hope it works
  • Altera_Forum's avatar
    Altera_Forum
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    Angela,

    Is your device just working as a RAM? Does 'a' and 'b' refer to address of the RAM? If yes then, do you really need such a high width for your RAM?
  • Altera_Forum's avatar
    Altera_Forum
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    I think to minimize your ram is not your only problem. I´m quiet shure that you can minimize your code to odata = idata as far as you have written it and that´s not what it should do I think. So why don´t you use some of Altera´s altsyncram to build your array. I think that´s the easiest way to manage your problem.

  • Altera_Forum's avatar
    Altera_Forum
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    There is another issue :

    --- Quote Start ---

    input [639:0] a;

    input [1279:0]b;

    reg [9:0] memory [9:0][9:0];

    assign odata = memory[a][b];

    --- Quote End ---

    as you can see be inserting the definitions for a and b you will get

    --- Quote Start ---

    reg [9:0] memory [9:0][9:0];

    assign odata = memory[639:0][1279:0];

    --- Quote End ---

    the read access to the memory uses a 640x1280 array, but the memory is instantiated only as a 10x10 array.