amildm
Contributor
3 years agoMulti-driven nets -> how to report ?
Hi All,
How is it possible to report the multi-driven nets in the design? Should these nets appear in the synthesis log?
Thank you!
Hello,
Multi-driven nets are not allowed in VHDL/Verilog HDL/SystemVerilog at all, you will receive below error during Synthesis and this will effectively stop the compilation, there won't be any reports because of that.
Error (10028): Can't resolve multiple constant drivers for net
So, if you don't receive this error then there is no multi-driven nets in your RTL code.
Regards,
Nurina