motor speed variable using FPGA

There's another way to generate a frequency with a (almost) continous range.

You must use an adder with an overflow detector.

The registered adder output is fed back to one of the inputs, while the second input is a value proportional to the desired frequency.

For example, let's suppose a 32bit wide adder, with inputs A and B and output (registered) Q. Let P be the overflow output.

You connect Q back to A. At each clock pulse you have Q = Q + B, then the overflow pulse is generated every 2^32 / B clocks.

In other words, the frequency of P signal is Fclock x B / 2^32 which can be modulated with a good resolution, provided you don't get too close to Fclock.

This is easy, if you only need a frequency synthesizer.

Generating the actual pwm could be more tricky, especially if you need an exact duty cycle rather than fixed width pulses,