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My 5c on schematics versus HDL.
If you're serious about creating systems using HDL, then those systems *MUST* have an associated testbench.
Schematic capture is tool specific, i.e., Quartus.
To simulate your design in Modelsim, you need a testbench (typically written in HDL), and an instance of your top-level design. During simulation you will typically save a waveform file so that you can visualize your design. The waveform node names are hierarchical, and represent a path into your design.
If your top-level is a schematic, then you have to convert that to HDL to simulate. I doubt the HDL Quartus generates for a top-level design is particularly readable.
Using a top-level schematic makes it very difficult to automate running all testbenches for a system, eg., lets say all project code is in a code versioning system, and I have machine setup to checkout all code, and run the testbenches. If the code is in pure HDL, then the testbenches can all be built and run in Modelsim. If however there are top-level schematics, then Quartus first needs to be run to generate HDL versions of the top-level, and then Modelsim run to simulate.
I personally prefer all code in an HDL language. Since Modelsim-ASE (Altera Starter Edition) only supports single language simulation, I try to stick with a single language, eg., VHDL or SystemVerilog, for tutorials or anything I want to give to someone else, as that way they can use free tools.
Its also very difficult to track changes using a code versioning system with schematic drawings. With HDL you can simply perform a difference between two text files.
Cheers,
Dave
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there's no doubt in my mind that there are and will be many limitations to my designs when writing Schematics. Honestly, it looks like it's barely even supported. I just feel that I've put countless hours into VHDL and have gotten nowhere, and I know that I've achieved great things with schematic-based designs on other platforms. I'm hoping that a mix of the two will help me to eventually get a better understanding of HDLs eventually, and digital hardware design for that matter.
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