Altera_Forum
Honored Contributor
Honored Contributormodlesim 6.6d
i am new to modlesim, i downloaded the latest version, i hope if someone tells me how to simulate vhdl program with modlesim in simple way
Forum Discussion
Altera_ForumHonored Contributor
Honored Contributoryou can only do inputs via a testbench.
A testbench is just an HDL file, like any other, that instantiates your unit under test.
