Forum Discussion
Altera_Forum
Honored Contributor
15 years ago1) Initial block are sythesized by Quartus. Of course not every construct in an initial block can be sythesized, but assigning power-up values to registers is valid. Many people however, don't like to use power-up values, they use reset instead.
2) An external reset is not mandatory, most designs can use an internal one. 3) Just forget about gate level simulation. Use static timing analysis and RTL level simulation.