ModelSim Random Input Stimulus?

In Modelsim, you have to write your own testbench to stimulate your design, so you will have to generate random numbers in VHDL.

There are 2 ways of doing this:

1. Use a linear feedback shift register. have a look at http://en.wikipedia.org/wiki/lfsr

2. There is a random number generator in the ieee.math_real package, a procedure called "uniform". It generates Reals between 0.0 and 1.0 (inclusive I think) and you can use this to generate random integers by scaling between two limits. Here is a procedure I created in a "testbench_tools" package for generating random integers (which can easily be converted to signed/unsigned/slv/ufixed/sfixed):

procedure rand_int( variable seed1, seed2 : inout positive; 
                           min, max : in integer; 
                           result : out integer) is
    variable rand      : real;
    variable val_range : real;
  begin
    assert (max >= min) report "Rand_int: Range Error" severity Failure;
    
    uniform(seed1, seed2, rand);
    val_range := real(Max - Min + 1);
    result := integer( trunc(rand * val_range )) + min;
  end procedure;

the two seed value must be variables in your testbench. min and max set the limits of the random number generation (inclusive). result is the random number