ModelSim "out of range" issue

Maybe it's just me, but since you didn't post the code that generates X and Y I'm not sure how the others were able to re-create the problem. In any case, my re-creation (full code posted below) works just fine, no errors reported, sim runs to completion. Modelsim 6.4c.

I suspect that in your simulation there may be a simulation delta delay between 'X' and 'Y' and that there is a delta cycle where X and Y do produce the value of 261. To verify I would suggest putting X, Y and lxn into a list window and observe there whether or not X and Y really are changing on the same delta cycle or not and whether or not X and Y are at values that would create the errent value at the time of the error.

Kevin Jennings

 
Library IEEE; 
  use IEEE.Std_Logic_1164.all;
  use IEEE.numeric_std.all;
  use IEEE.Math_real.all ;
entity foofoo is generic(WIDTH_DQ  :  natural  :=  9) ;
port(
  X  :  in  integer range -(2 ** (WIDTH_DQ - 1)) to 2 ** (WIDTH_DQ - 1) - 1 := 0 ;
  Y  :  in  integer range -(2 ** (WIDTH_DQ - 1)) to 2 ** (WIDTH_DQ - 1) - 1 := 0 
);
end foofoo;
architecture rtl of foofoo is
  signal  lxn  :  integer range -(2 ** (WIDTH_DQ - 1)) to 2 ** (WIDTH_DQ - 1) - 1 := 0 ;
  constant RANK:    integer := 2;
begin
  lxn <= X - Y / (2 ** RANK) ;
end rtl;
entity tb_foofoo is
end tb_foofoo;
architecture rtl of tb_foofoo is
    constant WIDTH_DQ:  natural  :=  9;
    signal X:   integer range -(2 ** (WIDTH_DQ - 1)) to 2 ** (WIDTH_DQ - 1) - 1 := 0;
    signal Y:   integer range -(2 ** (WIDTH_DQ - 1)) to 2 ** (WIDTH_DQ - 1) - 1 := 0;
begin
    process
    begin
        for x1 in 225 to 227 loop
            X <= x1;
            for y1 in -114 to -112 loop
                Y <= y1;
                wait for 10 ns;
            end loop;
        end loop;
        wait;
    end process;
    dut : entity work.foofoo
    generic map(WIDTH_DQ => WIDTH_DQ)
    port map(
      X => X,
      Y => Y);
end rtl;