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K_T's avatar
K_T
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6 years ago

Modelsim is not working with PCIe IP generated VHDL

I encounter problems for Cyclone V development. My design consist of 2 PCIe HIPs and some our logics. I am useing "Quartus Prime Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition" I simulate ou...
K_T's avatar
K_T
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6 years ago

​Hi,

OK, I'll try to simulate design using Verilog.

Best Regards