Forum Discussion
Altera_Forum
Honored Contributor
13 years ago --- Quote Start --- # PE Student Edition supports only a single HDL Theres your problem. FinitePrecRndNrst is probably a Verilog module --- Quote End --- Yeah, pretty much what I thought .... Thanks for the confirmation. I am playing around with some verlilog to VHDL conversion tools and see if recompiling them will bring some joy .... Thanks again !