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Altera_Forum
Honored Contributor
13 years agoI'm a couple steps further. Indeed the simulation runs until no changes occur. Meaning I have to gate the clock like :
-- Clock Generator process begin clock <='0'; wait until Reset = '1'; wait for clockcycle; while Reset = '1' loop clock <= '1'; wait for clockcycle/2; clock <= '0'; wait for clockcycle/2; end loop; wait; end process; The gate process : -- Reset process begin Reset <= '0'; wait for Clockcycle; Reset <= '1'; wait for EndOfTime; Reset <= '0'; wait; end process; Otherwise it runs forever. Clearly ignoring my wish with the End Time. And even stranger, I have to set the stuff up with a reset = 1 otherwise it also runs forever without a result. -- main begin data <= "00000011"; latch <= '1'; cnten <= '1' ; Reset <= '1'; -- must be 1 here !!! Now, at least I get a simulation going... Thanks a lot this far.