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If your project is not big then you may archive it in quartus(project => archive menu) then post it here. Or at least post your testbench code.
I assume you are using modelsim rather than quartus. You may also try quartus simulation(if you have it, though it disappeared in latest versions).
In fact quartus timing simulation was my favorite at some time for small projects and for learning purposes as you can see all delays inserted.
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Hello kaz. Yes, I am using modelsim-alter not quartus simulation. And here is my testbench:
LIBRARY ieee ;
USE ieee.std_logic_1164.all ;
ENTITY systemtb IS
END systemtb ;
ARCHITECTURE LogicFunction OF systemtb IS
COMPONENT system
port (start, clock, spike_1_1, spike_1_2, spike_1_3, spike_1_4, spike_1_5, spike_1_6, spike_1_7, spike_1_8, spike_1_9, spike_1_10,
spike_1_11, spike_1_12, spike_1_13, spike_1_14, spike_1_15, spike_1_16,
spike_3_1, spike_3_2, spike_3_3, spike_3_4, spike_3_5, spike_3_6, spike_3_7, spike_3_8, spike_3_9, spike_3_10,
spike_3_11, spike_3_12, spike_3_13, spike_3_14, spike_3_15, spike_3_16: IN std_logic := '0';
target_x, target_y: in integer range 1 to 16;
reach_target: buffer std_logic := '0';
rounds:buffer integer := 0;
cur_in_1, cur_out_1, cur_in_2, cur_out_2: buffer integer range 0 to 16 := 0);
END COMPONENT ;
signal start: std_logic :='0';
signal spike_1_1, spike_1_2, spike_1_3, spike_1_4, spike_1_5, spike_1_6, spike_1_7, spike_1_8, spike_1_9, spike_1_10,
spike_1_11, spike_1_12, spike_1_13, spike_1_14, spike_1_15, spike_1_16,
spike_3_1, spike_3_2, spike_3_3, spike_3_4, spike_3_5, spike_3_6, spike_3_7, spike_3_8, spike_3_9, spike_3_10,
spike_3_11, spike_3_12, spike_3_13, spike_3_14, spike_3_15, spike_3_16: std_logic := '0';
signal clock: std_logic := '0';
signal cur_in_1, cur_out_1, cur_in_2, cur_out_2: integer range 0 to 16 := 0;
signal target_x: integer range 0 to 16 := 12;
signal target_y: integer range 0 to 16 := 4;
signal reach_target: std_logic := '0';
signal rounds: integer := 0;
signal times: integer := 0;
BEGIN
l1: system port map (start, clock, spike_1_1, spike_1_2, spike_1_3, spike_1_4, spike_1_5, spike_1_6, spike_1_7, spike_1_8, spike_1_9, spike_1_10,
spike_1_11, spike_1_12, spike_1_13, spike_1_14, spike_1_15, spike_1_16,
spike_3_1, spike_3_2, spike_3_3, spike_3_4, spike_3_5, spike_3_6, spike_3_7, spike_3_8, spike_3_9, spike_3_10,
spike_3_11, spike_3_12, spike_3_13, spike_3_14, spike_3_15, spike_3_16,
target_x, target_y, reach_target, rounds, cur_in_1, cur_out_1, cur_in_2, cur_out_2);
clock <= not clock after 12.5ns;
statr: process
begin
start <= '0';
wait for 1000 ns;
start <= '1';
times <= times + 1;
wait for 3000 ns;
start <= '0';
wait for 20000 ns;
end process;
tb: process
begin
wait for 100 ns;
spike_1_1 <= '1';
spike_3_1 <= '1';
spike_1_16 <= '0';
spike_3_16 <= '0';
wait for 100 ns;
spike_1_1 <= '0';
spike_3_1 <= '0';
spike_1_2 <= '1';
spike_3_2 <= '1';
wait for 100 ns;
spike_1_2 <= '0';
spike_3_2 <= '0';
spike_1_3 <= '1';
spike_3_3 <= '1';
wait for 100 ns;
spike_1_3<= '0';
spike_3_3 <= '0';
spike_1_4 <= '1';
spike_3_4 <= '1';
wait for 100 ns;
spike_1_4 <= '0';
spike_3_4 <= '0';
spike_1_5 <= '1';
spike_3_5 <= '1';
wait for 100 ns;
spike_1_5 <= '0';
spike_3_5 <= '0';
spike_1_6 <= '1';
spike_3_6 <= '1';
wait for 100 ns;
spike_1_6 <= '0';
spike_3_6 <= '0';
spike_1_7 <= '1';
spike_3_7 <= '1';
wait for 100 ns;
spike_1_7 <= '0';
spike_3_7 <= '0';
spike_1_8 <= '1';
spike_3_8 <= '1';
wait for 100 ns;
spike_1_8 <= '0';
spike_3_8 <= '0';
spike_1_9 <= '1';
spike_3_9 <= '1';
wait for 100 ns;
spike_1_9 <= '0';
spike_3_9 <= '0';
spike_1_10 <= '1';
spike_3_10 <= '1';
wait for 100 ns;
spike_1_10 <= '0';
spike_3_10 <= '0';
spike_1_11 <= '1';
spike_3_11 <= '1';
wait for 100 ns;
spike_1_11 <= '0';
spike_3_11 <= '0';
spike_1_12 <= '1';
spike_3_12 <= '1';
wait for 100 ns;
spike_1_12 <= '0';
spike_3_12 <= '0';
spike_1_13 <= '1';
spike_3_13 <= '1';
wait for 100 ns;
spike_1_13 <= '0';
spike_3_13 <= '0';
spike_1_14 <= '1';
spike_3_14 <= '1';
wait for 100 ns;
spike_1_14 <= '0';
spike_3_14 <= '0';
spike_1_15 <= '1';
spike_3_15 <= '1';
wait for 100 ns;
spike_1_15 <= '0';
spike_3_15 <= '0';
spike_1_16 <= '1';
spike_3_16 <= '1';
end process;
END;
I would really appreciate it if you would have a look at the testbench and point out errors that I made. Thanks a lot!
David
Honored Contributor
