--- Quote Start ---
Gate level simulation takes a really really long time for complex designs and you don't really gain any insight. Keep in mind that it is still a simulation, so a bug in a gate-level component may not be reflected in hardware and vice versa. You should really get yourself an evaluation board with the device you plan on using in your own custom designs.
--- Quote End ---
Okay... Like I said, I have very limited knowledge about Quartus. What I actually want is to run the post synthesis simulation. I thought that should be the gate level simulation, but maybe I was wrong? Is there any method that I can verify my design after synthesis without having a board? Thanks!
David
Honored Contributor
