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Altera_Forum's avatar
Altera_Forum
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11 years ago

Mixed TDF/VHDL/BDF Project Files

When using mixed HDL files in a project, I presume that as long as you converter all AHDL (.tdf) files to vhdl and include them in the project list that is okay. This would included schematic (bdf) f...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

...I recently updated to 15.1 lite -> something prevent full launch of Modelsim from Quartus shell, the processes {vsim vish vlm} start but no any visible window.

Jerry, why does one need to recreate project?