Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Memory mapped IO query

Hi,

I have regular ROM & RAM working via altsyncram and now I'm trying to build some memory-mapped IO for my hobby CPU/SoC.

The MMIO code is pretty simple:

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library work;
use work.CPU_Definitions.all;
-- SUBTYPE OpData_Type is natural range 0 to 2**RAM_WIDTH-1; -- actually defined in my definitions package
entity MMIO is
PORT (
	signal clock : IN std_logic;
	signal MMIO_address : IN natural;
	signal MMIO_data_in : IN OPDATA_TYPE; 
	signal MMIO_data_out : OUT OPDATA_TYPE;
	signal MMIO_wren : IN std_logic
);
end entity MMIO;
architecture behaviour of MMIO is
CONSTANT num_MMIO_BYTES : natural := 2;
TYPE MMIO_Type is array (0 to num_MMIO_BYTES-1) of std_logic_vector(7 downto 0);
signal MMIO_array : MMIO_Type; -- this is mapped to physical pins in my top entity.
begin
	MMIO_process: process(clock)
	begin
		if rising_edge(clock) then	
			if MMIO_wren = '1' then
assert false report "writing "&integer'IMAGE(MMIO_data_in)&" to MMIO_address "&integer'IMAGE(MMIO_address) severity WARNING;
				MMIO_array(MMIO_address) <= std_LOGIC_VECTOR(to_unsigned(MMIO_data_in, MMIO_array(MMIO_address)'length));
			else
				MMIO_data_out <= to_integer(unsigned (MMIO_array(MMIO_address)));
			end if;
		end if;	
	end process MMIO_process;
end architecture behaviour;

When I simulate this, I see the correct data and address being passed into this process, and MMIO_wren is high. I've confirmed this with an assert statement. All values are within allowed parameters (address=1, data=0x55). However, the value is never stored in the actual array element and I can't see why. Furthermore, at the top level, I get warnings that the pins are forced to ground.

Any advice would be appreciated.

Thanks,

Mark
No RepliesBe the first to reply