Forum Discussion
Yes, I would like to write a bug report, I just can`t find a way to send it :-) Maybe You could help?
I`ve found the most basic way to replicate this issue. Take following *.hex file:
:1000000000010002000300040005000600070008CC
:100010000010001A001B001C001D001E001F002005
:00000001FF
If You open it in Quartus and specify 8-bit word length, it works just right:
If You open the same file specifying 16-bit word length, data addressing is broken:
As there was no gap in initial data, value 0010 supposed to be at address 08, value 001A at 09 and so on.
Exactly the same data displacement happens, if you initialize ROM or RAM from Basic Function IP with this file, and simulate this component in ModelSim, or compile it and upload to FPGA.
Tested in Quartus Prime Lite 18.1.0 Build 625 09/12/2018, ModelSim Intel FPGA Starter Edition 10.5b revision 2016.10, and on Cyclone IV EP4CE6E22C8N.
Temporary fix: reformat the hex file in one word per line style.