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Altera_Forum
Honored Contributor
Honored ContributorMegaWizard 2x8k Dual Port Memory
Try to Convert a Project to Cyclone III but need Help with the Memory Type Orginal Code module vidram(
output data_out, // cpu interface input data_in,
...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- will not work --- Quote End --- No, why don't you copy the original port assignment, e.g. disable wren_b?
