MegaWizard 2x8k Dual Port Memory

I had this idea already, but how do I have to assign

module vidrama(
                     output     data_out,    // cpu interface            
                     input         data_in,
                     input    cpu_addr,
                     input              we,
                     output     video_data,    // video hardware intf
                     input     video_addr,
                     input              clk
         );
....
vidrama vidram(
.data_out(vram_data),
.data_in(data_in),
.cpu_addr(addr),
.we(vram_we), 
.video_addr(video_addr),
.video_data(video_data),
.clk(clk)
);

module vidrama (
    address_a,//cpu_addr,
    address_b,//video_addr,
    clock,//clk
    data_a,//data_in,
    data_b,//data_in,
    wren_a,//we,
    wren_b,//we,
    q_a,//data_out,
    q_b//video_data,
         );
.....
    vidrama vidram(
             .data_a(data_in),
             .data_b(data_in),
             .address_a,(addr),
             .address_b,(video_addr),
             .wren_a(vram_we),   
             .wren_b(vram_we),                             
             .q_a(vram_data),
             .q_b(video_data),
             .clock(clk)
     );