Forum Discussion
Altera_Forum
Honored Contributor
16 years agoyou won't be able to do a gate level simulation of OpenCore Plus (which is what EDA Netlist Writer is doing), but when you generate the core you should be able to generate a simulation model which you can use in 3rd party simulators.
you will want to read up on the ModelSim manual: http://www.altera.com/literature/hb/qts/qts_qii53001.pdf and the simulating IP manual: http://www.altera.com/literature/hb/qts/qts_qii53014.pdf