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Altera_Forum
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11 years ago

Measuring an LVDS output signal?

Hello all! I am still relatively new to verilog design, and am looking for some help. I have an ALTDIDO megafunction that creates a 16-bit DDR bus that I feed to an output port. I am looking to...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

ALTDDIO_OUT is usually implemented in dedicated DDR output registers. In this case, no fanout is possible. You can duplicate the DDR output register for the respective bit.