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Altera_Forum
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10 years ago

Maximum Operating Frequency

Hi everybody, I designed a sample architecture in Quartus 10.1 by using EP4CE22F17C6. I used a bit generator and parallel mux blocks and run all architectures. I connect output of the bit gener...
Altera_Forum's avatar
Altera_Forum
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10 years ago

But early you said that you understand that routing delays take place in final value for Fmax.

Quartus provides very nice analysis for time-driven synthesis and provides arbitrary values for Fmax in worst-case scenario Slow(1200, 85c). It is not your iternal working frequency, it is upper limit only. So if you will far away from the worst condition then Fmax increased, check the Fmax in Slow(1200, 0v). You should conclude if desired slack achieved your working frequnecy could be beetwen Fmax(85C) and Fmax(0).