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Altera_Forum
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10 years ago

Maximum Operating Frequency

Hi everybody, I designed a sample architecture in Quartus 10.1 by using EP4CE22F17C6. I used a bit generator and parallel mux blocks and run all architectures. I connect output of the bit gener...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Provide real frequency for chip and your task it will exclude undesired Fmax changing)

You can check chip plan how far your instained multiplexors and try to compare when you do muxing in one if for all signals like

Out1 := d1&d3&d5 out2 := d2&d4&d6 if sel='0' then out <= out1 else out<=out2 end if

I am lazy for semicolons