does it really need to code multiplexor as you ?
why not to use simple else clause in single if instead of multiple if , and if you want multiplexor more than for 2 signal it is better to use case.
in any case your multiplexor have the same arhitecture and you need only one definition to make instance of all others. Only section for port map should be changed.
Are you sure that 0.25 is good value for 100MHz clock???
So you need make code more readable and manageable. And calculate right value.
you can apply restructure multiplexor global assignment if it be applicable you will see in report if it takes place.
Check Analysis and Synthesis report for average and max LUT-depth keep average at 5 or below. Compare your RTL with structure your await.