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Altera_Forum
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9 years ago

MAX10 DDR3 Controller Error (17044): Illegal connection on I/O input buffer primitive

I purchased the Altera MAX10 FPGA Development Kit with the intent of experimenting with the DDR3 controller. After instantiating the IP and compiling the project I get the dreaded "Error (17044): Il...
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Altera_Forum
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9 years ago

I am also getting this message. Some replies state making the qip file your top level file fixes the problem, but that is not an option for me.