Forum Discussion
Altera_Forum
Honored Contributor
12 years ago --- Quote Start --- I dont know what you want. If there is no compatible block, then it cant be converted to HDL. You have to separate the convertable stuff and non-convertable stuff in your model and only run HDL coder on the compatible part. Then the "extra" bits remain as a test harness for your design. If you expect to be able to convert them - you will get stuck very quickly. --- Quote End --- Sir, I want to convert the MATLAB model to verilog code using MATLAB's HDL workflow advisor. The entire functioning of the model depends on the combined assembly of both the convertable and non convertable stuff. So it is difficult to seperate unless a whole new model is formulated. Even if I am able to isolate the non convertable part then is it possible to implement those on a seperate with some connection to the compatible part FPGA board and still make the model work? I have uploaded the model file(.m file) previously. I can give screenshots of the environment if you want a clearer picture. Thanks for your time:)