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I take it you got some program inside your fpga that interfaces with your 0:1099 vector generator. Now you are happy with your program and want instead to get data from ADC then you connect 14 bits from ADC to your module instead of your vector generator. If ADC is not 14 bits then you resize it.
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Yes, exactly. ADC is also 14 bits
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That is assuming your program is meant to process ADC data directly. ADCs are various and you may need to do some reformatting if it is not giving you the right data format.
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The Daughter card uses ADC (AD 9248) whose output is either 2's complement or offset binary based on data format select pin (DFS) selected, as mentioned in its data Sheet. but I am still not sure which one is in my case as DFS selection is not clear to me from data sheet for channel A. It seems to me it is 2's complement output in channel A of ADC which I am using in my case.
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Regarding start/reset then it is up to the way you are processing.
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I have to detect certain patterns of 5 pulses(every pulse have close to 25 samples) from the continuous streams of input coming from ADC and as soon as this pattern is detected I have to store the input data starting from that detected point. I have also attached the simulation here for clarification.
Note: in this simulation, only 512 input is considered instead of 1099 I mentioned above.
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