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AAnch's avatar
AAnch
Icon for New Contributor rankNew Contributor
8 years ago

malloc selects Flash address for DMA transfers in memtest.c instead of SRAM

Hi, In the current design there is NIOSII, DMA, Flash & SRAM implemented targeted for Max 10 FPGA. Trying to perform the DMA transfer as per the reference memtest.c I see the below code in questi...
Ahmed_H_Intel1's avatar
Ahmed_H_Intel1
Icon for Frequent Contributor rankFrequent Contributor
7 years ago

Hello,

I've created a sample design (working on DE0_NANO_SoC) for the DMA including the following components(NIOS II processor, Two memories, DMA, Sys_ID and Jtag_UART)

The code show you how to set the channels, the data pointers start the transaction and to check the data receive success.

Attached is the full design files.

I hope this helps you and gets your satisfaction.

Regards.