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Brad wrote:
"it is OK to have only the "p" leg of a differential pin pair in the source file and let the Fitter automatically create the pin for the "n" leg and place it in the correct location."
So, no reference to the "n" signal should appear in the logic or in a pin assignment?
Just make the pin assignment to "p" pin with an LVDS type and couple that with the logic level signal in the top level source file?
What about for outputs, does it work the same way just in reverse? Make the "p" pin assignment, couple it with the logic level signal name and QII will pick-up the "n" for you?
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The standard Quartus method of dealing with differential signals--both inputs and outputs--is to have a single signal as a top-level port and to use that signal name in assignments. If the top-level port is called my_diff_pin, Quartus will use my_diff_pin for the "p" leg and my_diff_pin(n) for the "n" leg. You use my_diff_pin in assignments. When you are working in the Pin Planner, you might see a location assignment for my_diff_pin(n) appear, but that assignment is not necessary.
The primitives like alt_inbuf_diff were added to give users the option of including top-level ports for both the "p" and "n" legs for Cyclone III, Stratix III, and I expect (even though it isn't on the help page yet) Stratix IV.
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