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Altera_Forum's avatar
Altera_Forum
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14 years ago

Logic gate output from bus

Hello to everybody, I hope I am posting this at the right place. My question is actually very simple. I have a bus, e.g. a[3..0]. And I want to make an OR gate with one output which makes ORs...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Yeah, thanks. In the last time I studied a bit VHDL and that's exactly I was looking for.