Forum Discussion
Hi, I found a workaround for the error you are seeing:
http://fpgaforum.blogspot.com/2017/07/quartus-ii-synthesis-error-during.html
Please try this and let me know if the error still exists?
Sorry that link doesn't help.
I have added all files to the design, however this has to do with the design libraries they are built into. Since two files (and the modules inside them) have the same name, they cannot be built into the same library. If they are, I get an error about duplicate entities. I can get around that error by building each one into different design libraries. The libraries are 'work' and 'my_lib'.
Therefore 'main_project' is in 'work' and 'my_module_i' is in 'my_lib'. When Quartus compiles 'main_project' it treats 'my_module' as if it doesn't exist - I assume it searches work, can't find it and gives up with the error no module binding.
In VHDL the solution would be to add library my_lib; refer to my_lib at the instantiation but this isn't possible in SysV.