Occasional Contributor
Occasional ContributorThanks for the reply. I solved the issue in the meantime. But I did not follow the document you referred to.
I added a Verilog wrapper file for the generated floating point instance, since Verilog does not have the concept of libraries. Then I added the wrapper file to qip into the same library my component uses. After that, I was able to successfully instantiate the Verilog wrapper from my component's source code. I did not use autogenerated names, so it worked without any regex substitutions to the original source code.
Super ContributorGood to know that you are able to found the solution. This will be helpful to those who may come across similar issue.
With that, I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
Best Regards,
Richard Tan
p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.
