Large Routing Delay... - How to find

I think the next release of Quartus II will give more information, but it won't give every path. The best thing to do is to go to make a copy of your design, go to Assignments -> Settings -> Fitter -> Optimize Hold Timing and turn it Off(or to I/O Paths only). Then re-fit the design(you could go to Assignments -> Incremental Compilation and turn the all partitions(most likely just Top if you're not doing IC) to Post-Fit Placement so it skips synthesis and placement and jumps right to the router, just be sure to turn it back to source). On this next pass, the router will no longer be adding delays to meet your internal hold requirements, and all the paths with these requirements will show up as failing. It should become pretty apparent what's occurring from there.