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Altera_Forum
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11 years ago

Laboratory exercises solution

I need a solution for the Altera's digital logic laboratory exercise, especially the exercise about memory block (lab8). I'm a student so i guess i cant request these solutions from Altera, then i co...
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Altera_Forum
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11 years ago

You don't work with Nios II ?

it will be tedious, complex (and very boring) for a beginner write vhdl code for that. you go to the wrong way, i think. Because it is just a laboratory exercise : means pre-working board, just change a few thing, doesn't it ?

You can make this way for very small design.

Because your design employ PS/2, codec, vga. I think you should use the NIOS II/e (obviously with SOPC/QSYS) to get it more simple, faster.