keeping signals for signaltap

Hi,

May be can try with attribute noprune check this https://www.intel.com/content/www/us/en/programmable/quartushelp/17.0/hdl/vhdl/vhdl_file_dir_noprune.htm, adding virtual pins in the Assignment Editor or use "pre-synthesis" filter in SignalTap's node selector and tapped the signal inside a "component" rather than in the top-entity where it is generated.

Thanks,

Best regards,

Sheng

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