Honored Contributor
Honored ContributorFWIW, I was able to recover my top level QSYS design today. I noticed that the Java crash had something to do with validation of nios2 tightly coupled data and instruction masters when QSYS loads a design file into memory, and I also recalled that the last change I made in QSYS was related to moving the SGDMA descriptor ram between the top level system and the network subsystem (because I was unhappy with how the base address was being maintained in two places - both at the top level and at the subsystem level). I decided to try adding the on-chip SGDMA descriptor RAM back into the network subsystem to work around the QSYS crash but I couldn't remember any-longer the name of the on-chip ram master that was used in the export. Finally, after looking in the ginormous raw .qsys file I determined that the exact name of the export of the ram master, specified in the link in the top level subsystem, was "descr_ram_slave". After properly amending the export name in the network subsytem (using QSYS - I did not modifiy any QSYS files outside of QSYS) then I could open my top level design again in QSYS.
