Issues with Partial reconfiguration.

Question

Hi, i'm facing with issues relative to blinking_led partial reconfiguration example .sof recording. When i'm trying to program .rfb file, Programmer reports a error relative to access TIMEOUT and also, reports that PR_ERROR flag goes to high, signal from Partial reconfiguration controller IP, i think.

Someone already faced with the same issue? Dip switches positions should stay in default configuration?

I'm using the Arria 10 GX Development kit.

johnt_altera · Answer

Hi,Are you using internal host or external host? How do you send your data to the PR IP?​

deusmmjr · Answer

Internal host

Deusdete Miranda Matos Junior
Processamento de Alto Desempenho
SENAI/CIMATEC
Sistema FIEB   | www.fieb.org.br
(71) 3462-8404
deusdete.junior@fieb.org.br

deusmmjr · Answer

I did try send by USB Blaster. I'm using internal host.

Deusdete Miranda Matos Junior
Processamento de Alto Desempenho
SENAI/CIMATEC
Sistema FIEB   | www.fieb.org.br
(71) 3462-8404
deusdete.junior@fieb.org.br

johnt_altera · Answer

Hi,May I know how do you implement your design using internal host? Is your data is being sent to the PR IP correct?You can refer to https://fpgawiki.intel.com/wiki/Partial_Reconfiguration_Example_Design_with_Avalon_MM as your example​

deusmmjr · Answer

I tried to follow the document published in https://www.intel.com/content/www/us/en/programmable/documentation/ihj1482170009390.html

I have a special doubt about this tutorial. When, exactly, should I export root_partition_static.qdb?

Thanks a lot

JohnT (Intel)
Hi,

May I know how do you implement your design using internal host? Is your data is being sent to the PR IP correct?

You can refer to https://fpgawiki.intel.com/

AN 797: Partially Reconfiguring a Design on Intel Arria 10 ...&lt;https://www.intel.com/content/www/us/en/programmable/documentation/ihj1482170009390.html&gt;
www.intel.com
Partial reconfiguration (PR) feature allows you to reconfigure a portion of the FPGA dynamically, while the remaining FPGA design continues to function. You can create multiple personas for a particular region in your design, without impacting operation in areas outside this region. This methodology ...

Deusdete Miranda Matos Junior
Processamento de Alto Desempenho
SENAI/CIMATEC
Sistema FIEB   | www.fieb.org.br&lt;http://www.fieb.org.br&gt;
(71) 3462-8404
deusdete.junior@fieb.org.br

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Issues with Partial reconfiguration.

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