New Contributor
Super ContributorThe JTAG-to-Avalon bridge has to be in your Platform Designer system, added from the IP Catalog there, and connected to your custom component. It looks like you've added it outside the system and it's not connected to anything. ISSP should be in the system (can also be added from Platform Designer IP Catalog) and connected to the custom component as well. Also, for some reason, you have the sources and probes connected to each other which doesn't make much sense unless you're just testing to see that the probes display whatever you set the sources to.
New ContributorI am sorry for the confusion, but the ISSP is one left over of my many attempts to make this tool work (this is why it is connected in a loop), yet I understand that it should have been instantiated in the QSys tool, thanks for the correction.
The "jtag_avalon_bridge:jtag_avalon_bridge_inst" is a QSys system instantiation (I am using Quartus 11.1). The "internal_stats" module inside the QSys system is the custom module I would like to debug.
As I mentioned the access through the NIOS is still not working. Any idea about what might it be wrong there? The address spaces are mutually exclusive and the "data_master" from the CPU is connected to the "tb_avs" of the "internal_stats". Despite this is a read-only interface I can also write to its memory space and the values I see are not as expected (I would expect almost all memory sections being zeroed).
For your reference have a look at the screenshot below:
What else might it be wrong?
These are the NIOS II core settings:
