Forum Discussion
Altera_Forum
Honored Contributor
13 years agoOk so it works, now I am working on a similar piece which is more complicated. I once again tried doing it a simpler method but it didn't work. My guess is that I will need some really elaborate for loop combination to do this one.
insert_value_index := to_integer(unsigned(msbd) - unsigned(lsb));
insert_value := to_integer(unsigned(source_register(insert_value_index downto 0)));
destination_register_upper := to_integer(unsigned(destination_register(31 downto 1 + to_integer(unsigned(msbd)))));
destination_register_lower := to_integer(unsigned(destination_register( to_integer(unsigned(lsb)) - 1 downto 0)));
output <= std_logic_vector(to_unsigned(destination_register_upper, 31 - to_integer(unsigned(msbd)))) & std_logic_vector(to_unsigned(insert_value, insert_value_index)) & std_logic_vector(to_unsigned(destination_register_lower, to_integer(unsigned(lsb)))) ;