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- AnandRaj_S_Intel
Regular Contributor
Hi,
- The number of instructions which take more than one clock cycle is determined by the complexity of the ALU and its pipelining architecture. Therefore, the minimum and maximum cycles per instruction depend on the core you choose (Nios® II/f, Nios II/s, Nios II/e).
- For the cycles per instruction, refer to chapter 5, Nios II Core Implementation Details, in the Nios II Processor Reference Handbook
- Also, refer An391 fro examples.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an391.pdf
http://www.cs.columbia.edu/~sedwards/classes/2007/4840/n2cpu_nii5v1.pdf
Regards
Anand