Is there any openCL example that uses above 70% DSP resource usage?

Question

Does anyone know an example of an openCL fpga that uses 70%+ DSP resources?
On stratix 10 is the best

Or any RTL example that uses 70%+ DSP resources of stratix 10?

Thanks a lot

boonbengt_altera · Accepted Answer

Hi @3f28dsboek,

Thank you for posting in Intel community forum, hope all is well and apologies for the delayed in response.Following up on the queries, please do let us know if the doubts/clarification are still open, and we would try our best to clarify.
Best WishesBB

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Is there any openCL example that uses above 70% DSP resource usage?

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