is Quartus 17.1.0 Lite Edition's RTL Simulation with ModelSim-Altera suppurated in Ubuntu 18.04.1 LTS?

Hi, Im using Quartus 17.1.0 Lite Edition, but I'm unable to lurch the RTL Simulation using ModelSim-Altera.

I just moved from Ubuntu 16.04 LTS (where it worked fine), to to Ubuntu 18.04.1 LTS..

Is there any lite IDE with modelsim that I can use instead ? or is there a lib I'm missing?

Detailed Log during ModelSim-Altera crash:

`

Info: Quartus Prime Shell was successful. 0 errors, 1 warning
 
  Info: Peak virtual memory: 851 megabytes
 
  Info: Processing ended: Mon Nov 19 09:09:00 2018
 
  Info: Elapsed time: 00:00:01
 
  Info: Total CPU time (on all processors): 00:00:01
 
Failed to obtain lock: couldn't open "/home/dor/.modelsim_lock": file already exists
 
Error in startup script: 
 
Initialization problem, exiting.
 
 
 
Initialization problem, exiting.
 
 
 
Initialization problem, exiting.
 
 
 
  while executing
 
"Transcript::action_log "PROPREAD \"$key\" \"$value\"""
 
  (procedure "VsimProperties::Init" line 59)
 
  invoked from within
 
"VsimProperties::Init $MTIKeypath"
 
  (procedure "PropertiesInit" line 18)
 
  invoked from within
 
"PropertiesInit"
 
  invoked from within
 
"ncFyP12 -+"
 
  (file "/mtitcl/vsim/vsim" line 1)
 
** Fatal: Read failure in vlm process (0,0)
 

`

(and when removing the said lock file)

`

Info: Quartus Prime Shell was successful. 0 errors, 1 warning
    Info: Peak virtual memory: 849 megabytes
    Info: Processing ended: Mon Nov 19 09:16:12 2018
    Info: Elapsed time: 00:00:00
    Info: Total CPU time (on all processors): 00:00:01
Error in startup script: 
Initialization problem, exiting.
 
Initialization problem, exiting.
 
Initialization problem, exiting.
 
    while executing
"Transcript::action_log "PROPREAD \"$key\" \"$value\"""
    (procedure "VsimProperties::Init" line 59)
    invoked from within
"VsimProperties::Init $MTIKeypath"
    (procedure "PropertiesInit" line 18)
    invoked from within
"PropertiesInit"
    invoked from within
"ncFyP12 -+"
    (file "/mtitcl/vsim/vsim" line 1)
** Fatal: Read failure in vlm process (0,0)

`

OS: Ubuntu 18.04.1 LTS (64-bit)

FPGA Design IDE: Quartus Prime Version : 17.1.0 Build 590 10/25/2017 SJ Lite Edition

Thanks,

Dor