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anilinintel's avatar
anilinintel
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

Is my IP integration of modular-sgdma (with prefetcher enabled )is correct ?

i enabled prefetcher core option enabled. where should i connect this additional ports descriptor read master and write master. ? and anyone help me with the concept how and where descriptors should...
Ahmed_H_Intel1's avatar
Ahmed_H_Intel1
Icon for Frequent Contributor rankFrequent Contributor
7 years ago

I see some mistakes :

1- where is the clock source

2-Connect the NIOS II Instruction master to the memory that will hold the code only, the rest should be connected to the data master.

3- Where is the descriptor memory? I cannot see it.

4-What errors the Qsys shows?